Variations of metal-oxide-semiconductor field-effect transistor (MOSFET) structures have been explored for improvement in manufacturability and performance. One variation has been known as a “finFET”, which includes a strip or “fin” of a material, such as silicon, and a gate formed to surround the fin on three exposed sides. The channel region of the device is located in the fin, and typically a gate dielectric is provided between the fin and the gate.
Conventional gate dielectrics for finFETS have been fabricated using high temperature wet or dry thermal oxidation. However, this method disadvantageously consumes large amounts of silicon, which is a challenge as finFETS have limited substrate space and product dimension shrinks to increasingly smaller nodes.